1. Field of the Invention
Embodiments of present invention relate to a method of forming a phase change material layer, a method of forming a phase change memory device using the same, and a phase change memory device so formed. More particularly, embodiments of the present invention relate to a method of forming a phase change material layer, a method of forming a phase change memory device using the same, and a phase change memory device so formed that may reduce or eliminate the formation of voids or seams in a phase change material layer.
2. Description of the Related Art
Among semiconductor devices, a phase change memory device has a nonvolatile characteristic, such that stored data are not lost even if a supply of power is interrupted. The phase change memory device may employ a phase change material layer that may exhibit two stable states for storing data. The phase change material layer may be transformed into amorphous state or crystalline state according to a heating temperature and duration. Typically, the phase change material layer in an amorphous state has a higher resistivity than the phase change material layer in a crystalline state. Thus, using the change of the resistivity according to the state of the phase change material layer, it is possible to store data of logic “1” or “0” in a unit cell of the phase change memory device.
Joule heating may be used as the means of heating the phase change material layer to change the state thereof. For example, Joule heating may be generated around the phase change material layer by applying a current to electrodes connected to the phase change material layer. By adjusting the amount and/or duration of applied current to control the temperature and/or duration of the generated Joule heating, it is possible to perform a program or erase operation, i.e., to transform the phase change material layer into an amorphous or crystalline state.
Generally, a high temperature is required for transforming the state of the phase change material layer. For instance, it may be necessary to apply a temperature of about 630° C., near the melting temperature, for a Ge—Sb—Te (GST) layer to transform the GST layer into the amorphous state. A significant amount of current may be required to generate this much heat. Accordingly, the phase change memory device may exhibit a large power consumption. In addition, it may be difficult to highly integrate the phase change memory device, because a channel width of a MOS transistor in the phase change memory device may need to be increased in order to control the high current.
The amount of current used in a program and/or erase operation may be reduced by reducing the size of a contact area between the phase change material layer and an electrode connected thereto. By reducing the size of the contact area, a density of current flowing through the contact area may be increased, which may allow the amount of current used in the program and/or erase operation to be reduced. As the phase change material layer may be formed by depositing the phase change material layer in a hole that exposes the electrode, it will be appreciated that reducing the size of the contact area may require reducing a diameter of the hole, which may result in an aspect ratio of the hole being increased.
If the phase change material layer is deposited in the hole by blanketing the phase change material on the entire surface of the substrate, an overhang may develop at an upper portion of the hole, leading to a void in the phase change material below the overhang. Further, a seam may be formed where phase change material deposited on one sidewall of the hole contacts phase change material deposited on an opposite sidewall.
Voids and seams may degrade the operational characteristics of the phase change material layer. For example, a portion of the phase change material layer where the void or seam is formed may have a very high resistance, which may make detecting changes in resistance due to transformations between the crystalline and amorphous states difficult or impossible to sense accurately. Thus, a sensing margin of the phase change memory device may decrease. In addition, voids and seams may reduce the uniformity of unit cells in a phase change memory device, such that programming resistances, erasing resistances, the amount of program and erase current, etc., may be non-uniform, degrading the operation of the phase change memory device.